1. Field of the Invention
The present invention relates to a method for driving an electroluminescence display panel, and more particularly, to a method for driving an electroluminescence display panel in which data electrode lines and scan electrode lines cross each other with predetermined gaps and electroluminescence cells are formed in line crossing areas.
2. Discussion of the Related Art
Referring to FIG. 1, a conventional electroluminescence display panel includes a display panel 2 and a driving device, which includes a control unit 21, a scan driving unit 6, and a data driving unit 5. Charging switches 25 and a charging voltage determiner 22 may be included in the electroluminescence display panel 2 or in the driving device.
Data electrode lines 3 and scan electrode lines 4 cross each other with predetermined gaps to form electroluminescence cells 1 in areas where the lines 3 and 4 cross.
The control unit 21 processes external image signals to input display data signals and switching control signals to the data driving unit 5 and switching control signals to the scan driving unit 6 and the charging switches 25. The scan driving unit 6 drives the scan electrode lines 4 in accordance with the switching control signals. The data driving unit 5 drives the data electrode lines 3 according to the switching control signals and display data signals.
The charging switches 25 electrically connect or disconnect the data electrode lines 3 according to the switching control signal. The charging voltage determiner 22, which comprises a capacitor 24 and a zener diode 23 connected in parallel, determines a preliminary charging voltage of the data electrode lines 3 by using the zener diode 23 breakdown voltage.
A conventional method for driving an electroluminescence display panel, such as that disclosed in U.S. published patent application of publication no. 2002/0036605 (Title of Invention: “Organic EL Display Device and Method for Driving the Same”), will now be described with reference to FIG. 1 and FIG. 2. In FIG. 2, PRE and PEAK denote preliminary charging signals and peak booting signals, respectively, that the control unit 21 outputs to the data driving unit 5, the scan driving unit 6, and the charging switches 25. IDm and VDm denote a current waveform and a voltage waveform, respectively, that flow through any one data electrode line to which a luminescence data voltage is applied in the parallel driving periods. SSn is denotes the scan driving signal applied from the scan driving unit 6 to an n-scan electrode line. SSn+1 denotes the scan driving signal applied from the scan driving unit 6 to an (n+1)-scan electrode line.
Parallel driving periods T1, T2 include preliminary charging stages t1˜t21 and t3˜t41 and scan stages t21˜t3 and t41˜t5, respectively.
In the preliminary charging stage t1˜t21 of the n-parallel driving period T1, the signal input terminals of the data electrode lines 3 are electrically disconnected from the data driving unit 5. In addition, scan switches 10athrough 10c apply a second potential to the scan electrode lines 4 that prevents the electroluminescence cells 1 from emitting light. The charging switches 25 switch the other terminals of the data electrode lines 3 to be electrically connected to one another. Accordingly, parasitic capacitance of previously lit electroluminescence cells 1 in an (n−1)-scan electrode line is discharged, resulting in a higher data electrode line potential than a ground potential.
In the scan stage t21˜t3 of the n-parallel driving period T1, the charging switches 25 electrically disconnect the other terminals of the data electrode lines 3 from one another. Additionally, the signal input terminals of the data electrode lines 3 are switched and electrically connected to the data driving unit 5. The ground potential, as a first potential lower than the second potential, is applied to the scan electrode line that will be scanned, and the second potential is applied to the other scan electrode lines. Additionally, data current signals are applied to the signal input terminals of the data electrode lines 3. In peak booting stage t21˜t22 of the scan stage t21˜t3, additional current signals are applied to the signal input terminals of the data electrode lines 3.
The same operation as described above is performed in the (n+1)-parallel driving period T2.
FIG. 3A illustrates the current flow in the preliminary charging stages t1˜t21 and t3˜t41 of FIG. 2. Referring to FIG. 1, FIG. 2 and FIG. 3A, current I1 flows from the electroluminescence cells 1 to ground through the charging switches 25 and the zener diode 23, and current I2 flows from a power source V1 in the data driving unit 5 to ground through the parasitic capacitance in the data driving unit 5, the charging switches 25, and the zener diode 23. Here, the potential at point A is the zener diode 23 breakdown voltage. Accordingly, the voltage between the power source V1 and the point A is the voltage of the power source V1 minus the zener diode 23 breakdown voltage.
FIG. 3B illustrates the current flow in the scan stage t21˜t3 of FIG. 2. Referring to FIG. 1, FIG. 2, and FIG. 3B, current 14 flows from the power source V1 in the data driving unit 5 to ground through current sources 8 and the electroluminescence cells 1, and internal current 13 flows from the current sources 8 through the parasitic capacitance in the data driving unit 5. Here, the potential at point A is the terminal voltage of the electroluminescence cells 1. Accordingly, the voltage between the power source V1 and the point A is the voltage of the power source V1 minus the terminal voltage of the electroluminescence cells 1.
The data driving unit 5 of a conventional electroluminescence display panel will now be described with reference to FIG. 1 and FIG. 4.
The data driving unit 5 of a conventional electroluminescence display panel includes an (n+1)-data register 51, an n-data latch 52, a digital-analog converter 53, a booting circuit 54, and preliminary charging switches 55. The (n+1)-data register 51 receives data of the unit scan line 4a, 4b, or 4c from the control unit 21. The data stored in the n-data latch 52 is input to the digital-analog converter 53, and the data stored in the (n+1)-data register 51 is input to the n-data latch 52, based on parallel synchronous signals HSYNC. In other words, the data of the present parallel driving period is stored in the n-data latch 52, and the data of the following parallel driving period is stored in the (n+1)-data register 51. The digital-analog converter 53 processes the data input from the n-data latch 52 to output current data signals corresponding to the data lines 3a through 3e. The booting circuit 54 amplifies the current data signals in the peak driving stages t21˜t22 and t41˜t42, based on the timing control signal PEAK. The preliminary charging switches 55 are turned off in the preliminary charging stages t1˜21 and t3˜t41 and turned on in the scan stages t21˜t3 and t41˜t5, based on the preliminary charging signal PRE.
Based on the conventional method, the data electrode line potentials are higher than the ground potential due to the preliminary charging stage t1˜t21. Additionally, a brightness drop caused by the parasitic capacitance of the electroluminescence cells 1 may be prevented by applying additional current signals in the peak booting stage t21˜t22. The parasitic capacitance of the non-scanned electroluminescence cells 1 has a reverse polarity, and the driving voltage increases slowly while scanning the electroluminescence cells 1, resulting in the drop in brightness. However, such operations must be repeated every parallel driving period, which results in higher power consumption.